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1.2.2 Simultaneous Sampling Mode

Variable-width

acquisition window

Clock

[CONV00]

†

SOC

Legend: C1 − Duration of time for Ax channel result in result register

C2 − Duration of time for Bx channel result in result register

S − Acquisition window

[CONV00]

(A)

ADC Clock

Channel

Select

SH Clock

ADC SOC

Trigger

[CONV01]

(A)

Autoconversion Sequencer Principle of Operation

Figure 1-3 describes the timing of simultaneous sampling mode. In this example, the ACQ_PS bits are set

to 0001b.

Figure 1-3. Simultaneous Sampling Mode (SMODE=1)

A ADC channel address contained in [CONV00] 4-bit register; [CONV00] means A0/B0 channels; [CONV01] means

A1/B1 channels.

14 Analog-to-Digital Converter (ADC) SPRU812A – September 2007 – Revised October 2007

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ADC 320F Spezifikationen Seite 14