ADC 320F Spezifikationen

TMS320x2833x Analog-to-Digital Converter(ADC) ModuleReference GuideLiterature Number: SPRU812ASeptember 2007 – Revised October 2007

www.ti.com1.1 FeaturesDigital Value + 0,Digital Value + 4096 Input Analog Voltage * ADCLO3when input ≤ 0 Vwhen 0 V < input < 3 Vwhen input ≥ 3

www.ti.comResult RegistersePWMx SOCBS/WGPIO/XINT2_ADCSOCePWMx SOCAS/WSequencer 2Sequencer 1SOCSOCADC Control Registers70B7h70B0h70AFh70A8hResult Reg 1

www.ti.com1.2 Autoconversion Sequencer Principle of OperationAutoconversion Sequencer Principle of OperationTable 1-1. ADC Registers (continued)Name A

www.ti.com1.2.1 Sequential Sampling ModeVariable-widthacquisition windowADCClock[C0NV00]†[C0NV00]†S C1ADC SOC triggerC1Legend: C1 − Duration of time f

www.ti.com1.2.2 Simultaneous Sampling ModeSC1Variable-width acquisition windowClock[CONV00]†SOCLegend: C1 − Duration of time for Ax channel result in

www.ti.comADCINA0ADCINA1ADCINA7MAX_CONV1Ch Sel (CONV00)Ch Sel (CONV01)Ch Sel (CONV03)Ch Sel (CONV02)Ch Sel (CONV15)Statepointer12-bitanalog-to-digital

www.ti.comMAX_CONV1Ch Sel (CONV00)Ch Sel (CONV01)Ch Sel (CONV03)Ch Sel (CONV02)Ch Sel (CONV07)Statepointer12-bit A/D converterEOC12Result MUXResultsel

www.ti.comAutoconversion Sequencer Principle of OperationTable 1-2. Comparison of Single and Cascaded Operating ModesSingle 8-state sequencer #1 Singl

www.ti.comAutoconversion Sequencer Principle of OperationExample 1-1. Simultaneous Sampling Dual Sequencer Mode ExampleExample initialization:AdcRegs.

www.ti.com1.3 Uninterrupted Autosequenced ModeUninterrupted Autosequenced ModeExample 1-2. Simultaneous Sampling Cascaded Sequencer Mode ExampleAdcReg

2 SPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback

www.ti.comUninterrupted Autosequenced ModeExample 1-3. Conversion in Dual-Sequencer Mode Using SEQ1Suppose seven conversions are desired from SEQ1 (i.

www.ti.comCurrent conversion complete.Digital result is written intocorresponding ADCRESULTn registerConversion begins. SEQ_CNTR bits are decremented

www.ti.com25 µs50 µsePWMcounterPWM A/BoutputI1, I2, I3V1, V2,V3I1, I2, I3V1, V2, V3Uninterrupted Autosequenced ModeExample 1-4. Sequencer Start/Stop O

www.ti.com1.3.2 Simultaneous Sampling Mode1.3.3 Input Trigger DescriptionUninterrupted Autosequenced ModeTable 1-4. Values for ADCCHSELSEQn (MAX_CONV1

www.ti.com1.3.4 Interrupt Operation During Sequenced ConversionsUninterrupted Autosequenced ModeNotes:• An SOC trigger can initiate an autoconversion

www.ti.com25 µs50 µsePWMcounterPWM A/Boutput“a” “b” “c” “d”SamplingrequestSEQinterruptCase 1I1,I2,I3“b”I1,I2,I3V1,V2,V3“d”V1,V2,V3Case 2“b” “d”Case 3I

www.ti.com1.4 ADC Clock Prescaler4-bit clockdivider(x1, 1/2, ... 1/30)HSPCLKADCTRL3[4-1](ADCLKPS[3-0])x1/2x1ADCTRL1[7]=1(CPS=1)ADCTRL1[7]=0(CPS=0)SOC

www.ti.com1.6 Power-up Sequence1.7 Sequencer Override FeaturePower-up SequenceTable 1-8. Power OptionsPower Level ADCBGRFDN1 ADCBGRFDN0 ADCPWDNADC pow

www.ti.com1.8 ADC CalibrationADC CalibrationRecommendations and caution on sequencer override feature:• After reset, SEQ_OVRD bit will be 0; therefore

www.ti.com1.8.1 ADC_Cal Assembly Routine Method1.8.2 Pointer to-Function MethodADC CalibrationThe following three steps describe how to call the ADC_c

ContentsPreface ... 71 Ana

www.ti.com1.9 Internal/External Reference Voltage SelectionBandgapreferenceADC REFSELADC referenceADCREFINF280x DSPADCRESEXT(A)ADCREFP(A)ADCREFM(A)ADC

www.ti.com1.10 Offset Error CorrectionConvert ADCLO reference ~20 conversionsAreany codes0?YesNoCalculate the average output code of theconversionsSub

www.ti.comHitspercode0 1 2 3 4095ADC output code1.11 ADC to DMA InterfaceADC to DMA InterfaceFigure 1-13. Ideal Code Distribution of Sampled 0-V Refer

Chapter 2SPRU812A – September 2007 – Revised October 2007ADC RegistersThis chapter contains the ADC registers and bit definitions, with the registers

www.ti.com2.1 ADC Control RegistersADC Control RegistersFigure 2-1. ADC Control Register 1 (ADCTRL1) (Address Offset 00h)15 14 13 12 11 8Reserved RESE

www.ti.comADC Control RegistersTable 2-1. ADC Control Register 1 (ADCTRL1) Field Descriptions (continued)Bit(s) Name Value Description0 Start-stop mod

www.ti.comADC Control RegistersTable 2-2. ADC Control Register 2 (ADCTRL2) Field Descriptions (continued)Bit(s) Name Value Description13 SOC_SEQ1 Star

www.ti.comADC Control RegistersTable 2-2. ADC Control Register 2 (ADCTRL2) Field Descriptions (continued)Bit(s) Name Value Description5 SOC_SEQ2 Start

www.ti.com2.2 Maximum Conversion Channels Register (ADCMAXCONV)Maximum Conversion Channels Register (ADCMAXCONV)Table 2-3. ADC Control Register 3 (ADC

www.ti.comMaximum Conversion Channels Register (ADCMAXCONV)Table 2-4. Maximum Conversion Channels Register (ADCMAXCONV) Field DescriptionsBit(s) Name

List of Figures1-1 Block Diagram of the ADC Module ... 111-2 Sequen

www.ti.com2.3 Autosequence Status Register (ADCASEQSR)Autosequence Status Register (ADCASEQSR)Figure 2-5. Autosequence Status Register (ADCASEQSR) (Ad

www.ti.com2.4 ADC Status and Flag Register (ADCST)ADC Status and Flag Register (ADCST)Figure 2-6. ADC Status and Flag Register (ADCST) (Address Offset

www.ti.comADC Status and Flag Register (ADCST)ADC Registers42 SPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback

www.ti.com2.5 ADC Reference Select Register (ADCREFSEL)2.6 ADC Offset Trim Register (ADCOFFTRIM)ADC Reference Select Register (ADCREFSEL)Figure 2-7. A

www.ti.com2.7 ADC Input Channel Select Sequencing Control RegistersADC Input Channel Select Sequencing Control RegistersFigure 2-9. ADC Input Channel

www.ti.com2.8 ADC Conversion Result Buffer Registers (ADCRESULTn)ADC Conversion Result Buffer Registers (ADCRESULTn)Table 2-11. CONVnn Bit Values and

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,improvemen

List of Tables1-1 ADC Registers ... 111-2 C

List of Tables6 SPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback

PrefaceSPRU812A – September 2007 – Revised October 2007Read This FirstNotational ConventionsThis document uses the following conventions.• Hexadecimal

www.ti.comRelated Documents From Texas InstrumentsSPRU791— TMS320x28xx, 28xxx Enhanced Pulse Width Modulator (ePWM) Module Reference Guidedescribes th

Chapter 1SPRU812A – September 2007 – Revised October 2007Analog-to-Digital Converter (ADC)The TMS320x2833x ADC module is a 12-bit pipelined analog-to-