ADC 2 Spezifikationen Seite 3

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ADS7865
www.ti.com
SBAS441C OCTOBER 2008REVISED APRIL 2012
ELECTRICAL CHARACTERISTICS
At T
A
= –40°C to +125°C; over entire power-supply voltage range, V
REF
= 2.5V (internal), f
CLK
= 32MHz, and f
DATA
= 2MSPS,
unless otherwise noted.
ADS7865
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
RESOLUTION 12 Bits
ANALOG INPUT
FSR Full-scale differential input range (CHxx+) – (CHxx–) –V
REF
+V
REF
V
V
IN
Absolute input voltage CHxx+ or CHxx– to AGND –0.1 AV
DD
+ 0.1 V
C
IN
Input capacitance CHxx+ or CHxx– to AGND 2 pF
C
ID
Differential input capacitance 4 pF
I
IL
Input leakage current –50 50 nA
CMRR Common-mode rejection ratio Both ADCs, dc to 100kHz 72 dB
DC ACCURACY
–40°C < T
A
< +125°C –1.25 ±0.6 +1.25 LSB
INL Integral nonlinearity
–40°C < T
A
< +85°C –1 ±0.5 +1 LSB
DNL Differential nonlinearity –1 ±0.4 +1 LSB
Input offset error –3 ±0.5 +3 LSB
V
OS
Match –3 ±0.5 +3 LSB
dV
OS
/dT Input offset thermal drift ±2 μV/°C
Gain error –0.6 0.15 +0.6 %
G
ERR
Match –0.6 ±0.1 +0.6 %
G
ERR
/dT Gain error thermal drift ±2 ppm/°C
PSRR Power-supply rejection ratio AV
DD
= 5V 70 dB
AC ACCURACY
SINAD Signal-to-noise + distortion V
IN
= 5V
PP
at 100kHz 69 71.3 dB
SNR Signal-to-noise ratio V
IN
= 5V
PP
at 100kHz 70 71.7 dB
THD Total harmonic distortion V
IN
= 5V
PP
at 100kHz –87 –74 dB
SFDR Spurious-free dynamic range V
IN
= 5V
PP
at 100kHz 74 88 dB
SAMPLING DYNAMICS
t
CONV
Conversion time per ADC 1MHz < f
CLK
32MHz 13 Clocks
t
ACQ
Acquisition time 62.5 ns
f
DATA
Data rate 1MHz < f
CLK
32MHz 62.5 2000 kSPS
Aperture delay 6 ns
t
A
Match 50 ps
t
AJIT
Aperture jitter 50 ps
f
CLK
Clock frequency on CLOCK 1 32 MHz
(1) All values at T
A
= +25°C.
Copyright © 2008–2012, Texas Instruments Incorporated 3
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