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CLOCK

CONVST

DB[11:0]

B SU Y

Previous Con rsve ion

ofBothCHxx

Conversionof

BothDifferentialCHx0

Conversionof

BothDifferentialCHx1

Output

C AH x

Output

C BH x

Output

C AH 0

Output

C BH 0

1 00 h D 00 h

1414

ADS7865

SBAS441C –OCTOBER 2008–REVISED APRIL 2012

www.ti.com

Figure 32 shows a complete timing diagram The digital output code format of the ADS7865 is in

consisting of a write access to set up the proper input binary twos complement, as shown in Table 8.

channel, followed by an initiation of a conversion and Conversion results can be read out only once. A

the read access of both conversion results. second read access (without issuing a new

conversion) results in 000h as the output value.

The input multiplexer updates with the rising edge of

the WR input. The following falling edge of CONVST

triggers the conversion of the previously selected

channel. The data output register then updates with

the falling edge of BUSY and can be read thereafter.

Figure 32. Channel Selection Timing Diagram

Table 8. ADS7865 Output Data Format

DIFFERENTIAL INPUT VOLTAGE INPUT VOLTAGE AT CHXX+ HEXADECIMAL

DESCRIPTION (CHXX+) – (CHXX–) (CHXX– = V

REF

= 2.5V) BINARY CODE CODE

Positive full-scale V

REF

5V 0111 1111 1111 7FF

Midscale 0V 2.5V 0000 0000 0000 000

Midscale – 1LSB –V

REF

/4096 2.49878V 1111 1111 1111 FFF

Negative full-

–V

REF

0V 1000 0000 0000 800

scale

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 32 33

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