ADC 400F Spezifikationen PDF herunterladen (Seite 20)

16

List 3

LINE LOC OBJ SOURCE

1 A * * * * * * * * * * * * * * * * * * * * *

2 A * *

3 A * TLC2543 12–bit Serial Out ADC to MC68HC11 Microcontroller *

4 A * Interface Program *

5 A * *

6 A * This program contains subroutines ”TLC2543” and ”STORE”. *

7 A * ”TLC2543” reads in ADC mode control and channel select *

8 A * data via Port C. It then sends this data to the TLC2543 *

9 A * and at the same time receives the result of the previous *

10 A * conversion. *

11 A * ”STORE” puts the results into addresses $30 to $4B with *

12 A * MSBytes in even addresses and LSBytes in odd addresses. *

13 A * Channel 0 result in addresses $30 and $31 *

14 A * Channel 1 result in addresses $32 and $33 etc. *

15 A * *

16 A * * * * * * * * * * * * * * * * * * * * *

17 A

18 A 1000 BASEADD EQU $1000 Register block start

19 A 0000 PORTA EQU $00 Port A Data Register

20 A 0003 PORTC EQU $03 Port C Data Register

21 A 0007 DDRC EQU $07 Port C Data Dir Reg

22 A 0008 PORTD EQU $08 Port D Data Register

23 A 0009 DDRD EQU $09 Port D Data Dir Reg

24 A 0028 SPCR EQU $28 SPI Control Register

25 A 0029 SPSR EQU $29 SPI Status Register

26 A 002A SPDR EQU $2A SPI Data Register

27 A 00F0 MSBYTE EQU $F0 MSBYTE address

28 A 00F1 LSBYTE EQU $F1 LSBYTE address

29 A 00F2 TEMP EQU $F2 TEMP address

30 A 0000

31 A F800 ORG $F800 Start @ $F800

32 A * LDS #$0070 Set Stack Pointer

33 A F800 863E START LDAA #$3E Load 3EH in AA

34 A F802 A709 STAA DDRD,X Store 3EH in DDRD

35 A F804 8650 LDAA #$50 Load 50H into AA

36 A F806 A728 STAA SPCR,X Set SPI as master

37 A F808 8600 LDAA #$00 Load 00 into AA

38 A F80A A707 STAA DDRC,X Set PORTC – all I/Ps

39 A F80C 1C0820 BSET PORTD,X#$20 ;ADC CS high

40 A F80F BDF817 JSR TLC2543 Do A/D conversion

41 A F812 BDF84A JSR STORE Store results

42 A F815 20E9 BRA START Repeat above

43 A

44 A F817 CE1000 TLC2543 LDX #BASEADD

45 A F81A 8602 LDAA #02

46 A F81C 1C0820 CSHIGH BSET PORTD,X#$20

47 A * Set Port A bit 6 (TLC2543 CS) high

48 A F81F 4A DECA

49 A F820 26FA BNE CSHIGH

50 A F822 1D0820 BCLR PORTD,X#$20 ADC CS low

51 A F825 1E030210 BRSET PORTC,X#$02 LSB Do LSB first

52 A * if LSBF set.

53 A F829 A603 MSB LDAA PORTC,X Load Chan/mode data

54 A F82B A72A STAA SPDR,X Send the data to ADC

55 A * and receive MSByte

56 A F82D 1F2980FC LOOP1 BRCLR SPSR,X#$80 LOOP1 If SPIF=0,

57 A * repeat check

58 A F831 A62A LDAA SPDR,X

59 A F833 97F0 STAA MSBYTE Store MSByte

60 A F835 1E030210 BRSET PORTC,X#$02 RETURN

61 A * If MSB/LSB–first bit = 1, return

62 A F839 A603 LSB LDAA PORTC,X Load chan/mode data

63 A F83B A72A STAA SPDR,X Send the data to ADC

64 A * and receive LSByte

65 A F83D 1F2980FC LOOP2 BRCLR SPSR,X#$80 LOOP2 If SPIF=0,

66 A F841 A62A LDAA SPDR,X repeat check

67 A F843 97F1 STAA LSBYTE Store LSByte

68 A F845 1E0302E0 BRSET PORTC,X#$02 MSB

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