ADC 400F Spezifikationen PDF herunterladen (Seite 16)

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List 2

LINE LOC OBJ SOURCE

1 ;* * * * * * * * * * * * * * * * * * * * *

2 ;* *

3 ;* TLC2543 to H8 Microcontroller Interface Program. *

4 ;* *

5 ;* This program contains subroutines DATAIN, ADC, *

6 ;* FORMAT and STORE. *

7 ;* DATAIN reads channel number and mode data into the *

8 ;* microcontroller via Port4. ”ADC” controls A to D *

9 ;* conversion. ”FORMAT” changes conversion results from *

10 ;* LSB first format to MSB first format. ”Store” places *

11 ;* results in memory addresses 40 to 5B (MS Bytes in even *

12 ;* addresses, LS Bytes in odd addresses) according to *

13 ;* channel number. *

14 ;* * * * * * * * * * * * * * * * * * * * *

15 ;

16 ; * Define special function register names *

17 ;

18 FFDD RDR EQU H’FFDD ;Receive Data Register – RDR

19 FFDB TDR EQU H’FFDB ;Transmit Data Register – TDR

20 FFD8 SMR EQU H’FFD8 ;Serial Mode Register – SMR

21 FFDA SCR EQU H’FFDA ;Serial Control Register – SCR

22 FFDC SSR EQU H’FFDC ;Serial Status Register – SSR

23 FFD9 BRR EQU H’FFD9 ;Bit Rate Register – BRR

24 FFB8 P5DDR EQU H’FFB8 ;Port5 Data Direction Register

25 FFBA P5DR EQU H’FFBA ;Port5 Data Register – P5DR

26 FFB5 P4DDR EQU H’FFB5 ;Port4 Data Direction Register

27 FFB7 P4DR EQU H’FFB7 ;Port4 Data register – P4DR

28 FFB9 P6DDR EQU H’FFB9 ;Port6 Data Direction register

29 FFBB P6DR EQU H’FFBB ;Port6 Data Register

30

31

32 1000 ORG H’1000 ;Sets start of program

33 ;

34 ; * Main Program *

35 ;

36 1000 79001000 MOV.W #H’1000, R0

37 ; MOV.W R0, @H’0000 ;Sets reset vector to START

38 1004 7907FD00 MOV.W #H’FD00, SP ;Sets contents of Stack Pointer

39 1008 F984 START MOV.B #H’84, R1L ;* * * * * * * * * * * * * * *

40 100A 39D8 MOV.B R1L, @SMR:8 ;* Sets up serial port *

41 100C F931 MOV.B #H’31,R1L ;* registers for simultaneous*

42 100E 39DA MOV.B R1L, @SCR:8 ;* transmit and receive *

43 1010 F901 MOV.B #H’01,R1L ;* *

44 1012 39D9 MOV.B R1L, @BRR:8 ;* * * * * * * * * * * * * * *

45 1014 F901 MOV.B #H’01, R1L ;Sets R1(Low Byte) to 01H

46 1016 6A89FFB9 MOV.B R1L, @P6DDR ;Set Bit0 of Port6 as Output

47 101A 5E001082 JSR @DATAIN:16 ;Read in ADC channel/mode data

48 101E 5E00102C JSR @ADC:16 ;Do A/D conversion

49 1022 5E0010B4 JSR @FORMAT:16 ;Reformat A/D conversion result

50 1026 5E0010AC JSR @STORE:16 ;Store A/D conversion result

51 102A 40DC BRA START ;Repeat above routine.

52 ;

53 ; * Subroutine ADC which controls the conversion process *

54 ;

55 102C FA05 ADC MOV.B #H’05, R2L ;Put 05 in R2L

56 102E 7FBB7000 BSET #0, @P6DR:8 ;TLC2543 chip select goes high

57 1032 1A0A CSHIGH DEC R2L ;(R2L) – 1

58 1034 46FC BNE CSHIGH ;If not zero, CS stays high

59 1036 7FBB7200 BCLR #0, @P6DR:8 ;TLC2543 chip select goes low

60 103A 6A0CFFB7 MOV.B @P4DR, R4L ;Puts channel/mode data in R4L

61 103E 731C BTST #1, R4L ;Is LSBF of channel/mode data

62 1040 461E BNE LSBYTE ;If not, do LSBYTE first

63 1042 7EDC7370 MSBYTE BTST #7, @SSR:8 ;Is TDR empty ?

64 1046 47FA BEQ MSBYTE ;If not empty, repeat check.

65 1048 34DB MOV.B R4H, @TDR:8 ;Put channel/mode data in TDR

66 104A 7FDC7270 BCLR #7, @SSR:8 ;Reset TDRE bit of SSR to 0

67 104E 7EDC7360 TESTB61 BTST #6, @SSR:8 ;Is receive shift reg. empty ?

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