ADC 400F Handbuch PDF herunterladen (Seite 10)

Chapter 1. The electronics

Figure 1-5. Ampliﬁed Signal and Gate

The second output of the discriminator will go to a second gate and delay channel; this combined with

the CAEN V262 will trigger the computer when there is data on the V785. This channel will be run in

latched mode meaning that it will be given both a start and a stop signal for the gate. The output signal

will start being "true" when the start signal is received and stops being "true" when the stop signal is

received. The start signal is the signal from the discriminator. The discriminator output will go to the IN0

of the CAEN V262 I/O module. The stop signal is generated by the computer to indicate it has

responded to the trigger. That signal is present at the SHP2 output of the V262 and should be connected

to the stop on the gate and delay generator.

At this point your setup should be complete. Now is good time to make sure that your setup is the same

as Figure 1-1. If everything is setup correctly the BUSY and DRDY lights on the V785 should be lit up.

Note: The setup shown in ﬁgure 1 does not have a dead time lockout, that is it could try to process a

second event while the computer is still busy. This will not be a problem as long as source is a

predictable as a pulser but would be problematic if we replaced the pulser with a detector signal.

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 73 74

Keine Kommentare

ADC 400F Handbuch Seite 10